Electronics - VLSI Data Conversion Circuits (English)

   Monday, March 24, 2025   

Starting a new Lecture Notes Series on Electronics - VLSI Data Conversion Circuits

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Lecture 1: Mod-01 Lec-01 Introduction to Data Conversion

Lecture 2: Mod-01 Lec-02 Sampling-1

Lecture 3: Mod-01 Lec-03 Sampling-2

Lecture 4: Mod-01 Lec-04 Nonidealities in Samples

Lecture 5: Mod-01 Lec-05 Noise due to Sampling

Lecture 6: Mod-01 Lec-06 Distortion in a Sampling Switch

Lecture 7: Mod-01 Lec-07 Gate Boosted Switches-1

Lecture 8: Mod-01 Lec-08 Gate Boosted Switches-2

Lecture 9: Mod-01 Lec-09 Charge Injection

Lecture 10: Mod-01 Lec-10 S/H Characterization - 1

Lecture 11: Mod-01 Lec-11 S/H Characterization - 2

Lecture 12: Mod-01 Lec-12 FFTs and Leakage

Lecture 13: Mod-01 Lec-13 Spectral Windows - 1

Lecture 14: Mod-01 Lec-14 Spectral Windows-2

Lecture 15: Mod-01 Lec-15 ADC/DAC Definitions

Lecture 16: Mod-01 Lec-16 Quantization Noise - I

Lecture 17: Mod-01 Lec-17 Quantization Noise -2

Lecture 18: Mod-01 Lec-18 Oversampling & Noise Shaping

Lecture 19: Mod-01 Lec-19 Delta-Sigma Modulation - 1

Lecture 20: Mod-01 Lec-20 Delta-Sigma Modulation - 2

Lecture 21: Mod-01 Lec-21 Linearized Analysis

Lecture 22: Mod-01 Lec-22 Stability of Delta Sigma Modulators

Lecture 23: Mod-01 Lec-23 High Order DSMs

Lecture 24: NTF Design and Tradeoffs

Lecture 25: Mod-01 Lec-25 Single bit Modulators

Lecture 26: Loop Filter Architectures

Lecture 27: Mod-01 Lec-27 Continous-time Delta Sigma Modulation

Lecture 28: Mod-01 Lec-28 Implicit Antialiasing

Lecture 29: Mod-01 Lec-29 Modulators with NRZ and Impulsive DACs

Lecture 30: Mod-01 Lec-30 High Order CTDSMs

Lecture 31: Mod-01 Lec-31 CTDM Design

Lecture 32: Mod-01 Lec-32 Excess Loop Delay (ELD)

Lecture 33: Mod-01 Lec-33 ELD Compensation

Lecture 34: Mod-01 Lec-34 Effect of Clock Jitter on CTDSMs - 1

Lecture 35: Mod-01 Lec-35 Effect of Clock Jitter on CTDSMs - 2

Lecture 36: Mod-01 Lec-36 Dynamic Range Scaling

Lecture 37: Mod-01 Lec-37 Simulation of CTDSMs

Lecture 38: Mod-01 Lec-38 Integrator Design-1

Lecture 39: Mod-01 Lec-39 Integrator Design-2

Lecture 40: Mod-01 Lec-40 Flash ADC Design

Lecture 41: Mod-01 Lec-41 Latches and Metastability

Lecture 42: Mod-01 Lec-42 Offset in a Latch-1

Lecture 43: Mod-01 Lec-43 Offset in a Latch-2 Auto Zeroing

Lecture 44: Mod-01 Lec-44 Auto Zeroing-2

Lecture 45: Mod-01 Lec-45 Auto Zeroing-3

Lecture 46: Mod-01 Lec-46 Autozeroing in Flash ADCs

Lecture 47: Mod-01 Lec-47 Flash ADC Case Study

Lecture 48: Mod-01 Lec-48 Flash ADC Case Study

Lecture 49: Mod-01 Lec-49 Flash ADC in a Delta Sigma Loop

Lecture 50: Mod-01 Lec-50 DAC Basics

Lecture 51: Mod-01 Lec-51 Binary and Thermometer DACs

Lecture 52: Mod-01 Lec-52 Segmented DACs

Lecture 53: Mod-01 Lec-53 Optimal DAC Segmentation

Lecture 54: Mod-01 Lec-54 DAC Nonlinearities

Lecture 55: Mod-01 Lec-55 Current Steering DACs-1

Lecture 56: Mod-01 Lec-56 Current Steering DACs-2

Lecture 57: Mod-01 Lec-57 DAC Mismatches in DSMs

Lecture 58: Mod-01 Lec-58 Calibration and Randomization

Lecture 59: Mod-01 Lec-59 Dynamic Element Matching-1

Lecture 60: Mod-01 Lec-60 Dynamic Element Matching-2