Multi-Core Computer Architecture (English)

   Monday, April 15, 2024   

Starting a new Lecture Notes Series on Multi-Core Computer Architecture

Youtube Lecture Playlist Credits 

Channel Name: NPTEL IIT Guwahati

So Let Us Start to This Journey of Learning 

Multi-Core Computer Architecture By Lecture Notes together!

Lecture 1: Multi-Core Computer Architecture

Lecture 2: Lec 1: Review of Basic Computer Organization

Lecture 3: Lec 2: Instruction Set and Addressing Modes

Lecture 4: Lec 3: Instruction Encoding

Lecture 5: Lec 4: Performance Evaluation Methods

Lecture 6: Lec 5: Tutorial on Performance Evaluvation

Lecture 7: Lec 6: Introduction to RISC Instruction Pipeline

Lecture 8: Lec 7: Instruction Pipeline Hazards

Lecture 9: Lec 8: Tutorial on Instruction Pipeline and Hazards

Lecture 10: Lec 9: Control Hazards and Branch Prediction

Lecture 11: Lec 10: MIPS Pipeline for Multi-Cycle Operations

Lecture 12: Lec 11: Tutorial on Longer Pipeline and Branch Prediction

Lecture 13: Lec 12: Compiler Techniques to Explore ILP

Lecture 14: Lec 13: Dynamic Scheduling to Explore ILP

Lecture 15: Lec 14: Dynamic Scheduling with Tomasulo’s Algorithm

Lecture 16: Lec 15: Dynamic Scheduling with Speculative Execution

Lecture 17: Lec 16: Tutorial on Static and Dynamic Scheduling

Lecture 18: Lec 17: Advanced Pipelining & Superscalar Processors

Lecture 19: Lec 18: Introduction to GPU architectures

Lecture 20: Lec 19: Case study on GPU architectures

Lecture 21: Lec 20: Tutorial on Superscalar processors and GPU

Lecture 22: Lec 21: Introduction to Cache Memory

Lecture 23: Lec 22: Block Replacement Techniques & Write Strategy

Lecture 24: Lec 23: Design Concepts in Cache Memory

Lecture 25: Lec 24: Optimization Techniques in Cache Memory

Lecture 26: Lec 25: Advanced Cache Optimization Techniques

Lecture 27: Lec 26: Tutorial on Advanced Concepts in Cache Memory -1

Lecture 28: Lec 27: Tutorial on Advanced Concepts in Cache Memory -2

Lecture 29: Lec 28: Cache coherence and memory consistency

Lecture 30: Lec 29: Design Space for snooping protocols

Lecture 31: Lec 30: Directory Based Cache coherehce

Lecture 32: Lec 31: Cache coherence in multiprocessor design [T]

Lecture 33: Lec 32: Introduction to DRAM System

Lecture 34: Lec 33: DRAM Controllers & Address Mapping

Lecture 35: Lec 34: Secondary Storage Systems

Lecture 36: Lec 35: Design Concepts in Storage Systems

Lecture 37: Lec 36: Introduction to Tiled Chip Multicore Processors

Lecture 38: Lec 37: Routing Techniques in Network On Chip

Lecture 39: Lec 38: Network On Chip Router Micro-Architecture

Lecture 40: Lec 39: Concepts in Network on Chip

Lecture 41: Lec 40: Energy Efficient Bufferless NoC Routers

Lecture 42: Lec 41: Sidebuffered Deflection Routers

Lecture 43: Lec 42: Concepts in Deflection Routers [T]

Lecture 44: Lec 43: QoS of NoC and Caches in TCMP Systems

Lecture 45: Lec 44: Emerging Trends in Network On Chips

Lecture 46: Lec 45: Domain Specific Accelarators

Lecture 47: Lec 46: Introduction to VEGA Microprocessors (Case Study)

Lecture 48: Lec 47: Concepts in TCMP Systems

Lecture 49: Lec 48: How to Explore Computer Architecture?