Digital Electronics (English) (Part 2)

   Thursday, September 03, 2020   

Starting a new Lecture Notes Series on Digital Electronics

Youtube Lecture Playlist Credits 

Channel Name: Neso Academy

So Let Us Start to This Journey of Learning 

Digital Electronics By Lecture Notes together!

Lecture Description of this above Topic:

Lecture 103: Full Adder using Half Adder

Lecture 104: 4 Bit Parallel Adder using Full Adders

Lecture 105: Half Subtractor

Lecture 106: Full Subtractor | Easy Explanation

Lecture 107: Realizing Half Adder using NAND Gates only

Lecture 108: Realizing Half Adder using NOR Gates only

Lecture 109: Realizing Full Adder using NAND Gates only

Lecture 110: Realizing Half Subtractor using NAND Gates only

Lecture 111: Realizing Half Subtractor using NOR Gates only

Lecture 112: Realizing Full Subtractor using NAND Gates only (Part 1)

Lecture 113: Realizing Full Subtractor using NAND Gates only (Part 2)

Lecture 114: 2-Bit Multiplier Using Half Adders

Lecture 115: Carry Lookahead Adder (Part 1) | CLA Generator

Lecture 116: Carry Lookahead Adder (Part 2) | CLA Adder

Lecture 117: BCD Adder | Simple Explanation

Lecture 118: Introduction to Multiplexers | MUX Basic

Lecture 119: 4X1 Multiplexer

Lecture 120: 8X1 Multiplexer

Lecture 121: MUX Tree Basic | 4X1 MUX using 2X1 MUX | Easy Explanation

Lecture 122: Implementing 8X1 MUX using 2X1 MUX

Lecture 123: Implementing 8X1 MUX using 4X1 MUX (Special Case)

Lecture 124: 32X1 MUX using 8X1 MUX

Lecture 125: Implementation of Boolean Function using Multiplexers

Lecture 126: 1-Bit Full Adder using Multiplexer

Lecture 127: Logical Expression from Multiplexer

Lecture 128: Introduction to Demultiplexer | 1:2 DEMUX

Lecture 129: 1:4 Demultiplexer

Lecture 130: Full Subtractor using 1:8 Demultiplexer

Lecture 131: Demultiplexer as Decoder

Lecture 132: 2-Bit Comparator

Lecture 133: Introduction to Encoders and Decoders

Lecture 134: Priority Encoder

Lecture 135: Decimal to BCD Encoder

Lecture 136: Octal to Binary Encoder

Lecture 137: Hexadecimal to Binary Encoder

Lecture 138: Full Adder Implementation using Decoder

Lecture 139: Practice Problems on Combinational Circuits (Part 1)

Lecture 140: Practice Problems on Combinational Circuits (Part 2)

Lecture 141: Practice Problems on Combinational Circuits (Part 3)

Lecture 142: Practice Problems on Combinational Circuits (Part 4)

Lecture 143: Digital Electronics Test-1

Lecture 144: Introduction to Sequential Circuits | Important

Lecture 145: SR Latch | NOR and NAND SR Latch

Lecture 146: What is a Clock?

Lecture 147: Triggering Methods in Flip Flops

Lecture 148: How to get Edge Triggering | Simulation using Multisim

Lecture 149: Difference between Latch and Flip Flop

Lecture 150: Introduction to SR Flip Flop

Lecture 151: Truth Table, Characteristic Table and Excitation Table for SR Flip Flop

Lecture 152: Introduction to D flip flop

Lecture 153: Truth Table, Characteristic Table and Excitation Table for D Flip Flop

Lecture 154: Introduction to JK flip flop

Lecture 155: Truth Table, Characteristic Table and Excitation Table for JK flip flop

Lecture 156: Race Around Condition or Racing in JK Flip Flop

Lecture 157: Master Slave JK Flip Flop

Lecture 158: Behaviour of Master Slave D Flip Flop

Lecture 159: Introduction to T flip flop

Lecture 160: Truth Table, Characteristic Table and Excitation Table for T flip flop

Lecture 161: 5 Steps for Flip Flop Conversions | JK to D Flip Flop Conversion

Lecture 162: T Flip Flop to D Flip Flop Conversion

Lecture 163: SR Flip Flop to JK Flip Flop Conversion

Lecture 164: SR Flip Flop to T Flip Flop Conversion

Lecture 165: Preset and Clear Inputs in Flip Flop

Lecture 166: Introduction to State Table, State Diagram & State Equation

Lecture 167: Design Procedure for Clocked Sequential Circuits

Lecture 168: Mealy and Moore State Machines (Part 1)

Lecture 169: Mealy and Moore State Machines (Part 2)

Lecture 170: Analysis of Clocked Sequential Circuits (with D Flip Flop)

Lecture 171: Analysis of Clocked Sequential Circuits (with JK Flip Flop)

Lecture 172: Analysis of Clocked Sequential Circuits (with T Flip Flop)

Lecture 173: Sequence or Pattern Detector

Lecture 174: Sequence Detector (Example)

Lecture 175: State Reduction and Assignment

Lecture 176: ASM Chart

Lecture 177: ASM Chart for Moore State Machine

Lecture 178: Difference between Synchronous and Asynchronous Sequential Circuits

Lecture 179: Introduction to Counters | Important

Lecture 180: Types of Counters | Comparison between Ripple and Synchronous counters

Lecture 181: 3 Bit Asynchronous Up Counter

Lecture 182: 4 Bit Asynchronous Up Counter

Lecture 183: 3 bit & 4 bit Asynchronous Down Counter

Lecture 184: 3 Bit & 4 Bit UP/DOWN Ripple Counter

Lecture 185: Modulus of the Counter & Counting up to Particular Value

Lecture 186: State Diagram of a Counter

Lecture 187: Decade (BCD) Ripple Counter

Lecture 188: How to Design Synchronous Counters | 2-Bit Synchronous Up Counter

Lecture 189: 3-Bit Synchronous Up Counter

Lecture 190: 3-Bit & 4-bit Up/Down Synchronous Counter

Lecture 191: Ring Counter

Lecture 192: Johnson's Counter (Twisted/Switch Tail Ring Counter)

Lecture 193: Introduction to Registers

Lecture 194: Data Formats and Classification of Registers

Lecture 195: Shift Register (SISO Mode)

Lecture 196: Shift Register (SIPO & PIPO Mode)

Lecture 197: Shift Register (PISO Mode)

Lecture 198: Bidirectional Shift Register

Lecture 199: Universal Shift Register

Lecture 200: Practice Problems on Sequential Circuits (Part 2)

Lecture 201: Practice Problems on Sequential Circuits (Part 3)

Lecture 202: Programmable Logic Array (PLA) | Easy Explanation

Lecture 203: Programmable Array Logic (PAL)